This application is based on Japanese Patent Application Nos. 2000-125516 filed Apr. 26, 2000 and 2000-262115 filed Aug. 31, 2000 in Japan, the contents of which are incorporated here into by reference.
1. Field of the Invention
The present invention relates to an optical signal processing method and apparatus that inputs an optical pulse train such as optical packets, and carries out serial-to-parallel conversion or generates an optical clock pulse train and so on.
In addition, the present invention relates to a label processing method and apparatus for recognizing address information and the like of high-speed optical packets.
Furthermore, the present invention relates an optical memory method and apparatus that allows a memory composed of an electronic circuit to write freely a high-speed optical packet signal, and to read and output it as an optical packet signal, again.
Moreover, the present invention relates to implementing higher order functions such as a router or optical computer by combining techniques such as serial-to-parallel conversion, optical clock pulse generation, label processing and optical memory.
2. Description of the Related Art
Recently, with the explosive growth of data communications typified by the Internet, the need for enhancing the speed of optical signals has been increasing. In such an environment, a problem arises about processing directly an electrical signal with a rate greater than 10 Gbps by a conventional electronic circuit after converting an optical signal into an electrical signal by a photo detector. For example, such a router in optical packet communications needs a label recognition function in order to decide an output port by decoding the address information contained in the label of the optical packet, and a buffer memory function for delaying packet signals by a desired time period in order to avoid collision between optical packets. In such a case, since the conventional label recognition processing or memory processing function is usually carried out by silicon based LSIs, their speed is limited to less than 1 Gbps.
Thus, it is becoming increasingly difficult for employing conventional silicon-based electronic circuits to implement the label recognition processing or memory processing for the high-speed optical packet signals.
In view of this, such a technique as shown in FIG. 17 has been proposed recently. In FIG. 17, a high-speed optical packet signal is converted into an electrical signal by an O/E (optical-to-electrical) receiver 1 using a photo detector. Then, a clock signal is extracted from the electrical signal by an electrical clock signal generator 2 using InP- or GaAs-based high-speed electronic circuit technology. Using the clock signal, the high-speed electrical signal is converted into a plurality of parallel low-speed electrical signals by an electric serial-to-parallel converter 3, thereby enabling label recognition. On the other hand, as the memory processing, the following scheme is conceived. The electrical signals passing through the parallel conversion are stored into a memory cell array 4 consisting of an SRAM. When reading the electrical signals, the plurality of low-speed output electrical signals read out of the memory cell array 4 are rearranged into a high-speed serial electrical signal by an electrical parallel-to-serial converter 5 using the electronic circuit technology, and the high-speed serial electrical signal is finally converted into an optical packet signal by an E/O (electrical-to-optical) transmitter 6.
The method, however, is considered to have a limit of about 40 Gbps because it entirely depends on electronic circuits 2, 3 and 5 to implement the clock signal generation, serial-to-parallel conversion and parallel-to-serial conversion. Furthermore, to achieve the serial-to-parallel conversion to convert the serial signal to the plurality of low-speed signals by the InP- or GaAs-based high-speed electronic circuit technology, the high-speed electrical signal must be successively halved in frequency (such as 40 GHzxe2x86x9220 GHzxe2x86x92 . . . xe2x86x92several hundred MHz), which requires not a few stages, and hence presents a problem about clock extraction, phase control and the like at each stage. Besides, using the electronic circuits will increase the total power consumption considerably. In addition, since it is necessary for the conventional clock extraction by the electronic circuit to lock the oscillation frequency of the VCO (Voltage-Controlled Oscillator) using the feedback in the PLL (Phase Locked Loop), it is impossible to extract the clock signal instantaneously for the packet signal input in a burst.
Apart from the foregoing systems, several researches are conducted about parallel conversion (also called xe2x80x9ctime to space conversionxe2x80x9d) of a high-speed serial optical signal. As a conventional optical serial-to-parallel conversion method, such a scheme is conceived as splitting a high-speed optical signal into a plurality of optical signals, followed by converting the individual optical signals into low-speed optical signals using high-speed all-optical switches. For example, to carry out parallel conversion of a 100 Gbps high-speed optical signal to ten 10 Gbps low-speed optical signals, ten all-optical switches are used.
As other optical serial-to-parallel conversion methods, the following techniques are proposed. A method using a plurality of surface emitting second harmonic generation processes (Shih-Chen Wang et al., J. Lightwave Technol. Vol. 14, No. 12, P. 2736 (1996)); a method using exciton giant non-linear effect (K. Ema et al., Appl. Rhys. Lett. Vol. 59, No. 25, p. 2799 (1991)); and a method using hologram (P. C. Sunetal., Opt. Lett. Vol. 20, No. 16, p. 1728 (1995)).
However, the conventional method using the plurality of all-optical switches for the all-optical serial-to-parallel conversion has a problem of requiring a large scale apparatus, and increasing the power consumption. The conventional method using the surface emitting second harmonic generation has a problem of extremely low efficiency and large loss because of using non-resonant optical nonlinear effect. The conventional method using the exciton giant nonlinear effect has a problem of a need for cooling the nonlinear medium to the liquid helium temperature to achieve large nonlinear effect. Finally, the conventional method using the hologram has a problem of an extremely large loss because of using diffraction effect. Thus, all the conventional methods offer problems of demanding extremely large running costs, and being ineffective and difficult to maintain stable performance for a long time.
To solve the foregoing problems of the conventional techniques, a first object of the present invention is to implement optical signal processing by various silicon-based electronic circuits with low power consumption and rather simple configuration by allowing the high-speed input optical packet signal to convert itself into low-speed parallel optical signals.
To solve the foregoing problems of the conventional techniques, a second object of the present invention is to implement instantaneous reading of the label information in a high-speed optical packet that is input in a burst mode by generating a single optical pulse from the input optical packet, by converting the label of the optical packet into parallel signals at once using the optical pulse, and by leading the parallel signal to a label recognition circuit used as the silicon-based electronic circuit.
To solve the foregoing problems of the conventional techniques, a third object of the present invention is to implement a high-speed, low power consumption optical memory method and apparatus capable of handling a burst mode signal.
A fourth object of the present invention is to implement higher order functions of a router, optical computer or the like by combining techniques such as serial-to-parallel conversion, optical clock pulse generation, label processing and optical memory.
The optical signal processing method in accordance with the present invention enables a silicon-based electronic circuit, which is highly functional but is rather slow in its operation speed, to carry out the signal processing by allowing an input high-speed optical packet to convert itself into low-speed parallel signals. The foregoing conventional electronic circuit must extract a clock signal, repeatedly divide the optical packet signal (one 10 GHz signalxe2x86x92two 5 GHz signalsxe2x86x92four 2.5 GHz signals, etc.), and convert the divided signals to low-speed parallel electrical signals, which requires to divide the frequency of the clock signal and to adjust the timing. In contrast with this, the first method in accordance with the present invention generates a single optical pulse from the initial bit of the optical packet signal, and thereby optically converts the optical packet partly or entirely into parallel optical signals at once with optical state, thereby implementing the high-speed optical signal processing with a very simple configuration.
It is necessary for the first optical signal processing method in accordance with the present invention to generate constantly the single optical pulse from the input optical packet signal at a fixed timing as described above. To achieve this, the present method irradiates the photoconductive switch with the optical packet to supply the charges generated thereby to the capacitor to be stored. Once the capacitor is charged with the charges generated by the initial bit of the optical packet, the potential of the capacitor is kept at a fixed value independently of the manner in which the photoconductive switch is irradiated with the subsequent optical pulses involving various patterns. The potential of the capacitor that is raised abruptly by the initial bit is differentiated by a CR differential circuit to be converted into an electrical output pulse. The electrical pulse drives a semiconductor laser, thereby generating an optical pulse. The method in accordance with the present invention offers the following advantages. First, since the optical pulse is always generated from the initial bit of an incoming optical packet, the time period from the arrival of the optical packet to the generation of the single optical pulse is fixed. In addition, it can generate the single pulse instantaneously even for an optical packet arriving in a burst mode, which is difficult for the conventional electronic circuit. Furthermore, it can operate independently of the polarized state of incoming optical packets, and place always the polarized state of the output optical pulses in a fixed state (the characteristic is indispensable for the all-optical serial-to-parallel converter that will be described later). Moreover, once the capacitor is charged to its full by the initial bit, its dependency on the intensity is lost. Accordingly, the intensity of the optical output pulses is fixed constant in spite of the fluctuations in the intensity of the input optical packets. In addition, to extract a 40 GHz clock signal, for example, although the conventional method must use the electronic circuit with the corresponding speed, the method in accordance with the present invention can utilize an electronic circuit with a bandwidth of about a few gigahertz, because it employs the Gain-switch method of the semiconductor laser, which generates optical pulses with a width less than 20 ps from electrical pulses with a width of a few hundred picoseconds.
As for the method of parallelly converting the optical packet in part or in its entirety at once (the details of which will be described later), it is implemented by irradiating one point on a surface-normal optical switch with the single optical pulse generated by the foregoing method and k parallel optical packet signals with their phases being shifted bit by bit in order of precedence, thereby increasing the transmittance or reflectance at that point. According to the present method, since no external power supply is needed, and the surface-normal optical switch operates at its one point, the method can achieve its function with very low light intensity, making it possible to configure a low power consumption all-optical serial-to-parallel converter. In addition, a bunch of optical fibers disposed at each input port enables the surface-normal optical switch to operate at its multiple points, which can markedly increase the number of the parallel conversion by the same all-optical serial-to-parallel converter. Furthermore, although the conventional method using the electronic circuit requires a plurality of parallel converters to process a plurality of optical packets, the present method can carry out the parallel conversion of a plurality of optical packets independently and simultaneously using a single apparatus.
The partial or entire bits of the high-speed optical packet thus undergoing the simultaneous parallel conversion are converted to low-speed parallel electrical signals by a low-speed optical-to-electrical converter to be processed by a silicon-based electronic circuit. In this case, various types of silicon-based electronic circuits are applicable, and their different functions will change the functions of the high-speed optical signal processing apparatus in its entirety. For example, in the field of optical data communications, an optical label processing apparatus for high-speed optical packets can be configured by carrying out the parallel conversion of the label sections of IP optical packets by the foregoing method, and by utilizing a label recognition circuit for decoding the label information as the electronic circuit. Furthermore, as for 32-bit or 64-bit optical data, an optical data D/A (digital-to-analog) converter with a speed much higher than conventional converters can be implemented by carrying out simultaneous parallel conversion of all the bits of the optical data, and by employing an LSI with a function of D/A conversion as the electronic circuit.
The second optical signal processing method in accordance with the present invention carries out its processing as follows. It converts the single optical pulse into an optical pulse train with a loop optical waveguides. Then, using the foregoing all-optical serial-to-parallel converter, it iteratively carries out simultaneous parallel conversion of the optical packet on a k-bit by k-bit basis, thereby converting the entire optical packet into k low-speed optical signal streams. Subsequently, the k low-speed optical signal streams are converted into the same number of electrical signal streams by a low-speed optical-to-electrical converter, to be processed by a silicon-based electronic circuit. The present method is effective to process a long optical packet in its entirety. For example, using a silicon-based electronic memory as the electronic circuit makes it possible to write freely a ultra high-speed optical packet signal into the electronic memory. Furthermore, the k parallel electrical signals read out of the electrical memory are reconstructed into a high-speed optical packet signal again by an electric-parallel to optical-serial converter (the details of which will be described later) to be output.
As described above, the methods in accordance with the present invention can materialize a low power consumption, simple, small size, high-speed optical signal processing apparatus. In addition, it can handle a burst mode signal, and process the high-speed optical packets in part or in its entirety with no holds barred. The present invention can implement the following functions by using the label recognition circuit or electronic memory as the electronic circuit. First, it can implement a high-speed optical label recognition function (a function of reading address information of an optical packet, and deciding an output port), which will be indispensable as a function of a ultra high-speed router in the future. Second, it can implement a high-speed optical buffer memory function (a function of temporarily saving an optical packet to avoid collision between optical packets at an output port).
Moreover, since the present invention can implement high-order functions of such as a high-performance router or optical computer by combining the foregoing techniques such as the serial-to-parallel conversion, optical clock pulse generation, label processing and optical memory in accordance with the present invention, it is expected to greatly serve in the technical fields associated with the optical information processing.
The above and other objects, effects, features and advantages of the present invention will become more apparent from the following description of embodiments thereof taken in conjunction with the accompanying drawings.